Spacer Engineered FinFET Architectures : High-Performance Digital Circuit Applications

by Brajesh Kumar Kaushik , Pankaj Kumar Pal , Sudeb Dasgupta

Book Details

Format Hardback or Cased Book

ISBN-10 1498783597

ISBN-13 9781498783590

Publisher Taylor & Francis Inc

Imprint CRC Press Inc

Country of Manufacture US

Country of Publication GB

Publication Date Jun 6th, 2017

Print length 154 Pages

Weight 384 grams

Dimensions 16.10 x 24.10 x 1.60 cms

Product Classification: Nanotechnology Electrical engineering Circuits & components

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This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

This book focusses on the spacer engineering aspects of novel MOS-based devicecircuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

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