Introduction to Logic Synthesis using Verilog HDL
Book Details
Format
Paperback / Softback
Book Series
Synthesis Lectures on Digital Circuits & Systems
ISBN-10
3031797426
ISBN-13
9783031797422
Publisher
Springer International Publishing AG
Imprint
Springer International Publishing AG
Country of Manufacture
GB
Country of Publication
GB
Publication Date
Dec 31st, 2007
Print length
75 Pages
Product Classification:
Engineering: generalCircuits & componentsAutomatic control engineeringComputer hardware
AI Summary
Ksh 4,500.00
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Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics.
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